1. Field of the Invention
The present invention relates to a spread spectrum signal demodulation circuit. More specifically, the present invention relates to a spread spectrum signal demodulation circuit in which a demodulation PN code for demodulating a spread spectrum signal is generated by utilizing a variable frequency oscillator such as a voltage-controlled oscillator.
2. Description of the Prior Art
Conventionally, a spread spectrum communication system is known, wherein a carrier signal a spectrum of which is spread by a binary pseudo noise code (hereinafter, simply called as "PN code") having a spectrum width sufficiently broader than an information signal is transmitted, and at a receiving side, an original information signal is restored by multiplying a received signal by a demodulation PN code which is the same as a modulation PN code being used at a transmitting side.
In such a spread spectrum communication system, since the spectrum of the information signal is spread by a PN code having a broader spectrum width, in order to correctly restore the information signal, it is necessary to synchronize the demodulation PN code which is generated at the receiving side with the modulation PN code which is generated at the transmitting side.
As a method for synchronizing both the PN codes, a tau-dither method as shown in FIG. 1 is well known. In FIG. 1, a received spread spectrum signal is input to a first multiplier 9 through an input terminal 1. In addition, an output of a VCO (voltage-controlled oscillator) 2 is phase-modulated by an output signal from a low-frequency oscillator 4 such as a multivibrator in a phase modulator 3. An output from the phase modulator 3 is given to a selector 6 to which an oscillation signal from an oscillator 5 is further given. Any one of the above described signals is selectively output from the selector 6 in response to a high level or a low level of an output of an RS flip-flop 7 to be given to a PN code generator 8 and used as a clock signal therein. A modulation PN code from the PN code generator 8 is multiplied by the received spread spectrum signal in the multiplier 9. An output from the multiplier 9 is output at an output terminal 17 through a bandpass filter 10.
With reference FIG. 3, a description will be made for the PN code generator 8. The PN code generator 8 includes two D flip-flops 81 and 82 constituting a 2-bit shift register and, as a clock for the shift register constructed by the D flip-flops 81 and 82, a signal from the selector 6 (the oscillation signal from the oscillator 5 or VCO 2) is applied thereto. Outputs of the D flip-flops 81 and 82 of the shift register are given to an exclusive OR gate 83 and an output of the exclusive OR gate 83 is input to the most significant bit of the shift register, that is, a data input of the D flip-flop 81. Then, a demodulation PN code is output from the least significant bit of the shift register, that is, an output Q of the D flip-flop 82 .
If the contents of the shift register, that is, the D flip-flop 81 and 82 are initially "11", the output of the exclusive OR gate 83 becomes "0", and therefore, the contents of the D flip-flop 81 and 82 become "01" in response to a next clock from the selector 6. At this time, the exclusive OR gate 83 receives "0" and "1" and thus outputs "1". Therefore, when a next shift clock is given thereto, the contents of the D flip-flops 81 and 82 become "10". Therefore, the output of the exclusive OR gate 83 becomes "1" again and, when a next shift clock is given thereto, the contents of the D flip-flops 81 and 82 become "11". Thus, as shown in FIG. 4, in response to each of the shift clocks from the selector 6, a modulation PN code x, y and z such as "1", "1" and "0" are cyclically output. Therefore, the modulation PN code is formed by repetition of the data of 3 bits, for example.
Returning to FIG. 1, an output of the bandpass filter 10 is envelope-detected in a detector 11. An output of the envelope-detector 11 is further given to a multiplier 13 through a bandpass filter 12. Then, in the multiplier 13, an output signal from the bandpass filter 12 is multiplied by the output signal from the low-frequency oscillator 4. An output signal of the multiplier 13 is given to the VCO 2 through a low-pass filter 14 as a control signal therefor.
In addition, the output of the above described bandpass filter 10 is also applied to a level detector from which a set input S is given to an RS flip-flop 7 when the output level is more than a predetermined value. A signal from a switch 16 is given to a reset input of the RS flip-flop 7.
In the spread spectrum communication system, it is known that a level of the output signal from the multiplier 9 is changed as shown in FIG. 2 in accordance with a relative change of phases of the modulation PN code included the input spread spectrum signal and the demodulation PN code from the PN code generator 8.
In the spread spectrum signal demodulation circuit as shown in FIG. 5, when the switch 16 is operated to demodulate a spread spectrum signal, the RS flip-flop 7 is reset and the output Q becomes the low level. Therefore, the signal from the oscillator 5 is selectively applied to the PN code generator 8 through the selector 6 so that the oscillation signal from the oscillator 5 is used in the PN code generator 8 as a clock signal. Therefore, a modulation PN code is generated from the PN code generator 8 by using the oscillation signal of the oscillator. The demodulation PN code from the PN code generator 8 is multiplied with the spread spectrum signal from the input terminal 1 in the multiplier 9. If the phase of the demodulation PN code is not coincident with the phase of the modulation PN code included in the spread spectrum signal, it is impossible to demodulate the spread spectrum signal, and therefore, no output is obtained from the bandpass filter 10.
If, if the phase of the demodulation PN code from the PN code generator 8 is changed and the output of the multiplier 9, that is, bandpass filter 10 becomes larger than the predetermined level, the high level signal is output from the level detector 15. Therefore, the RS flip-flop is set so that the output Q the RS flip-flop becomes the high level. Therefore, the selector 6 selects the output of the phase modulator 3 to apply the PN code generator 8. In this state, assuming that an initial phase of the demodulation PN code from the PN code generator 8 exists a position of a point aa of FIG. 2 and the phase is advanced and shifted to a point ab, a relative phase of both the PN codes is between both the points aa and ab in accordance with a rectangular signal from the low-frequency oscillator 4, and in response thereto, the output signal of the first multiplier 9 is subjected to an amplitude modulation at the same frequency as that of the rectangular signal.
This amplitude-modulated components are derived by the bandpass filter 12 and thereafter multiplied by the rectangular signal in the multiplier 13 so that a direct current signal having a correct polarity and a correct level is obtainable to be given to the VCO 2 as a control signal therefor. A frequency of the VCO 2 is changed by the control signal, thereby to change the phase of the demodulation PN code from PN code generator 8.
In addition, where the relative phase of the both PN codes is between points ba and bb, a polarity of the output of the first multiplier 9 is reversed and a phase change of the demodulation PN code from the PN code generator 8 is also reversed.
Furthermore, where the relative phase of the both the PN codes is between points ca and cb sandwiching a peak of a correlation output as shown in FIG. 2, no change occurs in an amplitude of the output signal from the multiplier 9. Therefore, no amplitude-modulated components to be supplied to the multiplier 13 exist, and thus, the oscillation frequency of the VCO 2 that is, the phase of the demodulation PN code from the PN code generator 8 is not changed.
In such a tau-dither method, in order to synchronize the phase of the demodulation PN code at the receiving side with that of the modulation PN code at the transmitting side, it is necessary to use the phase modulator 3 as shown in FIG. 1. Therefore, a circuit configuration of a spread spectrum signal demodulation circuit was complex.